The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2009

Filed:

Oct. 07, 2007
Applicants:

Michael C. Parris, Colorado Springs, CO (US);

Oscar Frederick Jones, Jr., Colorado Springs, CO (US);

Inventors:

Michael C. Parris, Colorado Springs, CO (US);

Oscar Frederick Jones, Jr., Colorado Springs, CO (US);

Assignees:

United Memories, Inc., Colorado Springs, CO (US);

Sony Corporation, Tokyo, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); H04L 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A data inversion register technique for integrated circuit memory testing in which data input signals are selectively inverted in a predetermined pattern to maximize the probability of identifying failures during testing. In accordance with the technique of the present invention, on predetermined input/outputs (I/Os,) data inputs may be inverted to create a desired test pattern (such as data stripes) which are 'worst case' for I/O circuitry or column stripes which are 'worst case' for memory arrays. A circuit in accordance with the technique of the present invention then matches the pattern for the data out path, inverting the appropriate data outputs to obtain the expected tester data. In this way, the test mode is transparent to any memory tester.


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