The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2009
Filed:
Apr. 15, 2005
Ely K. Tsern, Los Altos, CA (US);
Richard M. Barth, Palo Alto, CA (US);
Craig E. Hampel, San Jose, CA (US);
Donald C. Stark, Los Altos, CA (US);
Ely K. Tsern, Los Altos, CA (US);
Richard M. Barth, Palo Alto, CA (US);
Craig E. Hampel, San Jose, CA (US);
Donald C. Stark, Los Altos, CA (US);
Rambus Inc., Los Altos, CA (US);
Abstract
A memory device having a memory core is described. The memory device includes a clock receiver circuit, a control interface, a data interface, a delay locked loop circuit, a read pipeline circuit and a circuit to provide an internal clock signal. The clock receiver circuit receives an external clock signal. The control interface receives a command that specifies a read operation to the memory device. The data interface transfers data between the memory device and an external set of signal lines. The delay locked loop circuit, coupled to the clock receiver circuit, to generate the internal clock signal using the external clock signal. The read pipeline circuit provides read data accessed from the memory core to the data interface. The circuit provides the internal clock signal to the read pipeline circuit in response to receipt of the command that specifies the read operation.