The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2009
Filed:
Feb. 16, 2007
Hieu Van Tran, San Jose, CA (US);
Hung Quoc Nguyen, Fremont, CA (US);
Anh Ly, San Jose, CA (US);
Sheng-hsiung Hsueh, San Jose, CA (US);
Sang Thanh Nguyen, Union City, CA (US);
Loc B. Hoang, San Jose, CA (US);
Steve Choi, Irvine, CA (US);
Thuan T. VU, San Jose, CA (US);
Hieu Van Tran, San Jose, CA (US);
Hung Quoc Nguyen, Fremont, CA (US);
Anh Ly, San Jose, CA (US);
Sheng-Hsiung Hsueh, San Jose, CA (US);
Sang Thanh Nguyen, Union City, CA (US);
Loc B. Hoang, San Jose, CA (US);
Steve Choi, Irvine, CA (US);
Thuan T. Vu, San Jose, CA (US);
Silicon Storage Technology, Inc., Sunnyvale, CA (US);
Abstract
A memory system includes memory cells arranged in sectors. A decoder corresponding to a sector disables memory cells having a defective top gate. The decoder may include a low voltage or high voltage latch for the disabling. A top gate handling algorithm is included. The memory system may include dynamic top gate coupling. A programming algorithm and waveforms with top gate handling is included.