The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2009

Filed:

Jan. 17, 2007
Applicants:

Jack T. Wong, Fremont, CA (US);

Kory Gong, Fremont, CA (US);

Inventors:

Jack T. Wong, Fremont, CA (US);

Kory Gong, Fremont, CA (US);

Assignee:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

Systems and methods are directed to verification of configuration data stored in memory cells. For example, in one embodiment, an integrated circuit such as a programmable logic device includes a plurality of non-volatile memory cells and a plurality of volatile memory cells adapted to receive and store data provided from the plurality of non-volatile memory cells. A comparator is adapted to compare stored data from the plurality of volatile memory cells with the data values of the plurality of non-volatile memory cells. Control circuitry is responsive to the comparator to control whether configuration data from the plurality of non-volatile memory cells is loaded to the plurality of volatile memory cells.


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