The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 24, 2009
Filed:
Mar. 29, 2006
Shaestagir Chowdhury, Beaverton, OR (US);
Chi-hwa Tsang, Beaverton, OR (US);
Shaestagir Chowdhury, Beaverton, OR (US);
Chi-Hwa Tsang, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Methods of fabricating an interconnect utilizing an electroless deposition technique, which fundamentally comprises providing a dielectric material layer having an opening extending into the dielectric material from a first surface thereof, and electrolessly depositing a conductive material within the opening. A dual-function barrier layer is formed within the opening. The dual-function barrier layer is capable of acting as a diffusion barrier layer and a nucleation surface for a conductive material. An electrolessly deposited conductive material is formed immediately above the dual-function barrier layer. An ultra-thin seed layer may be formed immediately on top of the barrier layer prior to the electrolessly deposited conductive material being formed thereon.