The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2009
Filed:
Feb. 07, 2005
Kostantin Godin, Herzliya, IL;
Moshe Anschel, Kfar Saba, IL;
Yacov Efrat, Kfar Saba, IL;
Leonid Rabinovich, Richon Le Zion, IL;
Noam Sivan, Ganei Tikva, IL;
Eitan Zmora, Jerusalem, IL;
Ziv Zamsky, Ra'Anana, IL;
Kostantin Godin, Herzliya, IL;
Moshe Anschel, Kfar Saba, IL;
Yacov Efrat, Kfar Saba, IL;
Leonid Rabinovich, Richon Le Zion, IL;
Noam Sivan, Ganei Tikva, IL;
Eitan Zmora, Jerusalem, IL;
Ziv Zamsky, Ra'Anana, IL;
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A device that includes: a first bus, connected between a first logic and a first circuit; a group of second buses connected between the first logic and between multiple non-high impedance circuit access logics associated with multiple circuits; wherein each circuit access logic is adapted to: (i) provide to the first logic, a circuit write value during a circuit writing period and during an idle period that follows the circuit writing period and ends when another circuit is allowed to write; and (ii) provide a default value when another circuit is allowed to write; and wherein the first logic is adapted to alter a state of the first bus in response to a change between two consecutive circuit write values.