The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 27, 2009
Filed:
Feb. 13, 2007
Cheng Lin, Singapore, SG;
Nurulhuda Binte Jumahri, Singapore, SG;
Cheng Lin, Singapore, SG;
Nurulhuda Binte Jumahri, Singapore, SG;
TECH Semiconductor Singapore Pte Ltd, Singapore, SG;
Abstract
Methods and systems for wafer lot ordering using including estimation of allowable queue time based on utilization loss and rework percentage have been achieved. The method invented comprises steps of ranking lots, allocating equipment to the exit step of queue time, calculating and determining the optimal allowable queue time based on utilization loss and rework percentage, calculating the next available time for equipment, calculating earliest release time, and releasing lot/batch and pre-assign it to the equipment at exit step. The present invention can be applied to other manufacturing lines than semiconductor manufacturing.