The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 13, 2009
Filed:
Jul. 03, 2007
Kentaro Yamada, Hitachi, JP;
Masato Takahashi, Mito, JP;
Tatsuyuki Konagaya, Hitachinaka, JP;
Takeshi Katoh, Hitachinaka, JP;
Masaki Sakashita, Mito, JP;
Koichiro Takei, Hitachinaka, JP;
Yasuhiro Obara, Hitachinaka, JP;
Yoshio Fukayama, Ichinomiya, JP;
Kentaro Yamada, Hitachi, JP;
Masato Takahashi, Mito, JP;
Tatsuyuki Konagaya, Hitachinaka, JP;
Takeshi Katoh, Hitachinaka, JP;
Masaki Sakashita, Mito, JP;
Koichiro Takei, Hitachinaka, JP;
Yasuhiro Obara, Hitachinaka, JP;
Yoshio Fukayama, Ichinomiya, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
For improving the reliability of a semiconductor device having a stacked structure of a polycrystalline silicon film and a tungsten silicide film, the device is manufactured by forming a polycrystalline silicon film, a tungsten silicide film and an insulating film successively over a gate insulating film disposed over the main surface of a semiconductor substrate, and patterning them to form a gate electrode having a stacked structure consisting of the polycrystalline silicon film and tungsten silicide film. The polycrystalline silicon film has two regions, one region formed by an impurity-doped polycrystalline silicon and the other one formed by non-doped polycrystalline silicon. The tungsten silicide film is deposited so that the resistivity of it upon film formation would exceed 1000 μΩcm.