The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2009
Filed:
Feb. 14, 2007
Manoj Chirania, Palo Alto, CA (US);
Philip D. Costello, Saratoga, CA (US);
Robert I-che Fu, Saratoga, CA (US);
Manoj Chirania, Palo Alto, CA (US);
Philip D. Costello, Saratoga, CA (US);
Robert I-Che Fu, Saratoga, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
An apparatus and method to accurately simulate negative bias and temperature instability (NBTI) and its effect. According to a first simulation method, a simulation netlist is automatically scanned for any P-type devices that are in a conductive state after application of an initial condition. Each conductive P-type device is automatically replaced with an NBTI device model and a first simulation cycle is executed. After the first cycle, each conductive P-type device is again replaced with an NBTI model and a second simulation cycle is executed. In a second simulation method, only those P-type devices transitioning from a non-conductive state to a conductive state are automatically replaced with an NBTI model prior to each half cycle of the second simulation method. The first simulation method provides robustness, while the second simulation method provides worst case verification in less time as compared to the first simulation method.