The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2009

Filed:

Jan. 03, 2007
Applicants:

Nobuhiro Kinoshita, Kodaira, JP;

Jumpei Konno, Tachikawa, JP;

Inventors:

Nobuhiro Kinoshita, Kodaira, JP;

Jumpei Konno, Tachikawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a semiconductor device includes the steps of: grinding the rear surface of a semiconductor wafer to reduce its thickness; flattening the rear surface of the semiconductor wafer; dividing the semiconductor wafer into a plurality of semiconductor chips; forming gold bumps on the electrodes of the plurality of semiconductor chips; applying NCP to the front surface of a packaging board; and arranging the semiconductor chips over the packaging board through the NCP and pressing the back surfaces of the semiconductor chips to flip-chip bond the semiconductor chips to the packaging board. Therefore, it is possible to prevent NCP from rising onto the back surfaces of the semiconductor chips at the time of flip-chip bonding, whereby separation and cracking caused by a high-temperature treatment for assembly and mounting of a semiconductor device can be prevented and the reliability of the semiconductor device can be improved.


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