The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 29, 2009
Filed:
May. 22, 2007
Dar-sun Tsien, Los Altos, CA (US);
Chien-kuo Wang, Hsin-Chu, TW;
Chen-hsien Hsu, Hsinchu County, TW;
Wei-jen Wang, Tainan County, TW;
Dar-Sun Tsien, Los Altos, CA (US);
Chien-Kuo Wang, Hsin-Chu, TW;
Chen-Hsien Hsu, Hsinchu County, TW;
Wei-Jen Wang, Tainan County, TW;
United Microelectronics Corp., Hsin-Chu, TW;
Abstract
IC design flow includes RTL design, synthesis, APR, and layout. An IC designer can choose a suitable standard cell for an integrated circuit according to the timing, area, and BCI (best cell index) of each standard cell. Further, the BCI of a standard cell can be generated by generating critical dimensions of a standard cell in a plurality of surroundings, generating a plurality of circuit parameters corresponding to the plurality of surroundings, calculating the differences of the plurality of circuit parameters and the ideal circuit parameter of the standard cell, and analyzing the distribution of the differences.