The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2009

Filed:

Feb. 24, 2006
Applicants:

San-ta Kow, San Jose, CA (US);

Ann Wu, San Jose, CA (US);

Tou Nou Thao, San Jose, CA (US);

Inventors:

San-Ta Kow, San Jose, CA (US);

Ann Wu, San Jose, CA (US);

Tou Nou Thao, San Jose, CA (US);

Assignee:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/02 (2006.01); G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, a programmable logic device for recovery from soft error upsets (SEUs) includes: a configuration memory operable to store configuration data; a configuration engine operable to configure the configuration memory; an error detection circuit operable to determine if the stored configuration data in the configuration memory has an error; and a configuration reset circuit operable to trigger the configuration engine to reconfigure the configuration memory if the error detection circuit detects the error.


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