The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 29, 2009
Filed:
Sep. 14, 2007
Applicants:
Vishal Sarin, Cupertino, CA (US);
Hieu Van Tran, San Jose, CA (US);
William John Saiki, Mountain View, CA (US);
Inventors:
Vishal Sarin, Cupertino, CA (US);
Hieu Van Tran, San Jose, CA (US);
William John Saiki, Mountain View, CA (US);
Assignee:
Silicon Storage Technology, Inc., Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
Abstract
A memory system includes reference level generators that may provide programmable margins, and programmable verify voltage levels. The reference levels may be shifted within a range of voltages with varying differences between reference voltage levels and with different margins and verify levels.