The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7589362 B1

PDF
Full Text
Expired
Date of Patent:
Sep. 15, 2009

Filed:

Jun. 15, 2007
Applicants:

Dimitri Argyres, San Jose, CA (US);

Bindiganavale S. Nataraj, Cupertino, CA (US);

Inventors:

Dimitri Argyres, San Jose, CA (US);

Bindiganavale S. Nataraj, Cupertino, CA (US);

Assignee:

NetLogic Microsystems, Inc., Mountain View, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 29/94 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit (IC) device including a substrate, a plurality of device layers formed over the substrate, and a plurality of multi-level revision (MLR) structures that generate a revision code indicative of device revisions. Each MLR group structure includes a number of MLR cells and includes a parity circuit having a number of inputs coupled to the outputs of the MLR cells and having an output to generate a corresponding bit of the revision code. The MLR cells in each MLR group structure are assigned to different device layers, and each device layer is assigned to one MLR cell in each MLR group structure. Each revision code bit is controllable by any MLR cell in the corresponding MLR group structure.


Find Patent Forward Citations

Argyres, Dimitri. (2009). Configurable non-volatile logic structure for characterizing an integrated circuit device (U.S. Patent No. 7589362). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7589362

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