The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7587643 B1

PDF
Full Text
Expired
Date of Patent:
Sep. 08, 2009

Filed:

Aug. 25, 2005
Applicant:

Rajesh Chopra, Fremont, CA (US);

Inventor:

Rajesh Chopra, Fremont, CA (US);

Assignee:

T-RAM Semiconductor, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit may include a packet decoder to receive serial data and to decode JTAG signals from the packets received. A JTAG processor may test the electrical circuitry dependent on the JTAG signals decoded. In a further embodiment, a test system may include a library of selectable JTAG routines. An encoder may encode a signal with serial data representative of sequential JTAG signals for at least one of the selectable JTAG routines. In a method of testing, the integrated circuit may receive the serial data signal at a predetermined terminal. A portion of the serial data may be examined to determine the presence of a predefined signature key. JTAG data may then be parsed from the serial data and tests performed based on the parsed JTAG data.


Find Patent Forward Citations

Chopra, Rajesh. (2009). System and method of integrated circuit testing (U.S. Patent No. 7587643). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7587643

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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