The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2009

Filed:

Nov. 09, 2004
Applicants:

Suresh K. Marisetty, Fremont, CA (US);

Rajendra Kuramkote, Newcastle, WA (US);

Koichi Yamada, Los Gatos, CA (US);

Scott D. Brenden, Bothell, WA (US);

Kushagra V. Vaid, San Jose, CA (US);

Inventors:

Suresh K. Marisetty, Fremont, CA (US);

Rajendra Kuramkote, Newcastle, WA (US);

Koichi Yamada, Los Gatos, CA (US);

Scott D. Brenden, Bothell, WA (US);

Kushagra V. Vaid, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system and method for injecting hardware errors into a microprocessor system is described. In one embodiment, a software interface between system software and system firmware is established. Software test and debug for software error handlers may thus be supported. The software interface may support both a query mode call and a seed mode call. When a query mode call is issued, it may request whether or not the system firmware and hardware support the injection of a specified kind of error. A return from this call may be used to make a list of supported errors for injection. When a seed mode call is issued, the corresponding error may be injected into the hardware.


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