The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2009

Filed:

Oct. 16, 2007
Applicants:

Richard Booth, Hillsboro, OR (US);

Phillip Johnson, Hillsboro, OR (US);

Zheng Chen, Hillsboro, OR (US);

Inventors:

Richard Booth, Hillsboro, OR (US);

Phillip Johnson, Hillsboro, OR (US);

Zheng Chen, Hillsboro, OR (US);

Assignee:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, the invention can be a clock-generating circuit having one or more clock-processing circuits, each outputting a clock signal having an adjustable phase. Each clock-processing circuit comprises a divider and a divisor control circuit. Each divider divides an input clock signal by a respective divisor value and outputs a corresponding output clock signal whose period is determined by the divisor value and the period of the input clock signal. Each divider receives the respective divisor value from the corresponding divisor control circuit, wherein the divisor value is selected in order to achieve a desired frequency and phase for the corresponding output clock signal. Temporarily changing a divisor value can advance or delay the phase of the corresponding output clock signal without having to reset the divider.


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