The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7586183 B1

PDF
Full Text
Expired
Date of Patent:
Sep. 08, 2009

Filed:

Apr. 18, 2006
Applicants:

Takeshi Kawabata, Osaka, JP;

Motoaki Satou, Kyoto, JP;

Toshiyuki Fukuda, Kyoto, JP;

Toshio Tsuda, Osaka, JP;

Kazuhiro Nobori, Osaka, JP;

Seiichi Nakatani, Osaka, JP;

Inventors:

Takeshi Kawabata, Osaka, JP;

Motoaki Satou, Kyoto, JP;

Toshiyuki Fukuda, Kyoto, JP;

Toshio Tsuda, Osaka, JP;

Kazuhiro Nobori, Osaka, JP;

Seiichi Nakatani, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor module is formed by alternately stacking resin boards and sheet members. Each of the resin boards includes first buried conductors. A semiconductor chip is mounted on the upper face of each of the resin boards. Each of the sheet members having an opening for accommodating the semiconductor chip and including second buried conductors electrically connected to the first buried conductors. A first resin board located at the bottom is thicker than second resin boards. Each of the sheet members includes an adhesive member covering the upper and side faces of the semiconductor chip.


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Kawabata, Takeshi. (2009). Multilevel semiconductor module and method for fabricating the same (U.S. Patent No. 7586183). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7586183

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