The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2009
Filed:
May. 24, 2006
Jan Hoentschel, Neustadt in Sachsen, DE;
Andy Wei, Dresden, DE;
Thorsten Kammler, Ottendorf-Okrilla, DE;
Michael Raab, Radebeul, DE;
Jan Hoentschel, Neustadt in Sachsen, DE;
Andy Wei, Dresden, DE;
Thorsten Kammler, Ottendorf-Okrilla, DE;
Michael Raab, Radebeul, DE;
Advanced Micro Devices, Inc., Austin, TX (US);
Abstract
By forming a strained semiconductor layer in a PMOS transistor, a corresponding compressively strained channel region may be achieved, while, on the other hand, a corresponding strain in the NMOS transistor may be relaxed. Due to the reduced junction resistance caused by the reduced band gap of silicon/germanium in the NMOS transistor, an overall performance gain is accomplished, wherein, particularly in partially depleted SOI devices, the deleterious floating body effect is also reduced, due to the increased leakage currents generated by the silicon/germanium layer in the PMOS and NMOS transistor.