Method of manufacturing double diffused drains in semiconductor devices

Abstract

A method of manufacturing double diffused drains in a semiconductor device. An embodiment comprises forming a gate dielectric layer on a substrate, and masking and patterning the gate dielectric layer. Once the gate dielectric layer has been patterned, a second dielectric layer, having a different depth than the gate dielectric layer, is deposited into the pattern. Once the dielectric layers have been placed into a step form, DDDs are formed by implanting ions through the two dielectric layers, whose different filtering properties form the DDDS. In another embodiment the implantations through the two dielectric layers are performed using different energies to form the different dose regions. In yet another embodiment the implantations are performed using different species (light and heavy), instead of different energies, to form the different dose regions.