The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2009
Filed:
May. 05, 2006
Tuyet Ngoc Simmons, Los Gatos, CA (US);
Andy T. Nguyen, San Jose, CA (US);
Andrew W. Lai, Fremont, CA (US);
Randy J. Simmons, San Jose, CA (US);
Shankar Lakkapragada, San Jose, CA (US);
Tuyet Ngoc Simmons, Los Gatos, CA (US);
Andy T. Nguyen, San Jose, CA (US);
Andrew W. Lai, Fremont, CA (US);
Randy J. Simmons, San Jose, CA (US);
Shankar Lakkapragada, San Jose, CA (US);
XILINX, Inc., San Jose, CA (US);
Abstract
Method and apparatus for testing input/output circuits of an integrated circuit are described. An integrated circuit includes input/output circuits having input/output pads. The input/output pads are capable of being coupled together to a tester channel. The input/output circuits each are configurable via configuration circuitry to be in either a first mode or a second mode responsive to a select circuit of the configuration circuitry coupled to receive a first input for the first mode and a second input for the second mode. The select circuit is controlled responsive to a control select signal common to all or a portion of the select circuits of each of the input/output circuits.