The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7582530 B1

PDF
Full Text
Expired
Date of Patent:
Sep. 01, 2009

Filed:

Jun. 30, 2006
Applicants:

Henry Chao, Cupertino, CA (US);

Krishna Parat, Palo Alto, CA (US);

Inventors:

Henry Chao, Cupertino, CA (US);

Krishna Parat, Palo Alto, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

Formation techniques are utilized to increase the space or distance between floating gates of a memory array of floating gate transistors. In at least some embodiments, floating gates are first formed over the substrate and then portions of the floating gates are removed to increase the spacing between the floating gates. An interlayer dielectric layer is then formed over the substrate and a control gate layer is formed thereover.


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