The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 25, 2009
Filed:
Jan. 04, 2006
Neil G. Jacobson, Los Altos, CA (US);
Matthew T. Murphy, San Jose, CA (US);
Tim Tuan, San Jose, CA (US);
Kameswara K. Rao, San Jose, CA (US);
Robert O. Conn, Laupahoehoe, HI (US);
Neil G. Jacobson, Los Altos, CA (US);
Matthew T. Murphy, San Jose, CA (US);
Tim Tuan, San Jose, CA (US);
Kameswara K. Rao, San Jose, CA (US);
Robert O. Conn, Laupahoehoe, HI (US);
XILINX, Inc., San Jose, CA (US);
Abstract
A PLD includes a plurality of logic blocks, a test circuit, and a test pin set. The logic blocks are coupled to gating circuits that selectively adjust an operating voltage for the blocks in response to control signals. During operation of the PLD, the control signals are updated in response to externally-generated signals provided to the PLD via the test pin set and routed to the logic blocks using the test circuit.