The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2009

Filed:

Dec. 29, 2004
Applicants:

Dave Minturn, Hillsboro, OR (US);

James B. Crossland, Banks, OR (US);

Sujoy Sen, Portland, OR (US);

Greg Cummings, Portland, OR (US);

Inventors:

Dave Minturn, Hillsboro, OR (US);

James B. Crossland, Banks, OR (US);

Sujoy Sen, Portland, OR (US);

Greg Cummings, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The apparatus and method described herein are for enabling cacheable writes to I/O device registers. A cache monitor, which may be present in a controller hub, monitors accesses to cache lines in a microprocessor. The cache monitor also associates cache lines in the microprocessor with I/O device registers. When an access to certain cache lines are detected, the cache monitor is operable to receive the contents of the cache line and write those contents to an associated I/O device register. Therefore, a microprocessor may write to a cache line, instead of making an uncacheable write to the I/O device register directly.


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