The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 25, 2009
Filed:
Nov. 09, 2006
Nickhil Jakatdar, Los Altos, CA (US);
Xinhui Niu, San Jose, CA (US);
Junwei Bao, Palo Alto, CA (US);
Nickhil Jakatdar, Los Altos, CA (US);
Xinhui Niu, San Jose, CA (US);
Junwei Bao, Palo Alto, CA (US);
Tokyo Electron Limited, Tokyo, JP;
Abstract
The invention includes a method and a system for generating integrated circuit (IC) simulation information regarding the effect of design and fabrication process decisions. One embodiment includes creating and using a data store of profile-based information comprising metrology signal, structure profile data, process control parameters, and IC simulation attributes. Another embodiment includes creation and use of a simulation data store generated using test gratings that model the geometries of the IC interconnects. The interconnect simulation data store may be used in-line for monitoring electrical and thermal properties of an IC device during fabrication. Other embodiments include methods and systems for generating and using simulation data stores utilizing a metrology simulator and various combinations of a fabrication process simulator, a device simulator, and/or circuit simulator. Information from the simulation data store may be used in-line in-situ during the design or fabrication process steps.