The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 25, 2009
Filed:
Oct. 23, 2006
Wen Chiao Ho, Tainan, TW;
Chin Hung Chang, Tainan, TW;
Cheng-chi Liu, Shulin, TW;
Kuen-long Chang, Taipei, TW;
Chun Hsiung Hung, Hsinchu, TW;
Wen Chiao Ho, Tainan, TW;
Chin Hung Chang, Tainan, TW;
Cheng-Chi Liu, Shulin, TW;
Kuen-Long Chang, Taipei, TW;
Chun Hsiung Hung, Hsinchu, TW;
Macronix International Co., Ltd., Hsinchu, TW;
Abstract
A method for determining read voltage margins in a memory array compares as-read sum codes generated from data read from the memory array with expected sum codes generated from the loaded data. The read voltage (Vt) is stepped and the as-read sum codes are compared to the expected sum codes to determine the Vt range(s) that provides matching sum codes. Multiple read voltage margins (i.e. the read voltage margins between multiple programming levels of the MLC memory array) are determined in a parallel fashion as Vt is stepped across its range.