The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 11, 2009
Filed:
Oct. 25, 2006
Varughese Mathew, Austin, TX (US);
Eddie Acosta, Martindale, TX (US);
Ritwik Chatterjee, Austin, TX (US);
Sam S. Garcia, Austin, TX (US);
Varughese Mathew, Austin, TX (US);
Eddie Acosta, Martindale, TX (US);
Ritwik Chatterjee, Austin, TX (US);
Sam S. Garcia, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A semiconductor process is taught for performing electroless plating of copper overlying at least a portion of a layer comprising cobalt, nickel, or both cobalt and nickel. The cobalt and/or nickel comprising layer may be formed using electroless plating. For some embodiments, a tin layer is then formed overlying the copper. The tin layer may be formed using immersion plating or electroless plating. A micropad may comprise the cobalt and/or nickel comprising layer and the copper layer. In some embodiments, the micropad may also comprise the tin layer. In one embodiment, the micropad may be compressed at an elevated temperature to form a copper tin intermetallic compound which provides an interconnect between a plurality of semiconductor devices.