The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 11, 2009
Filed:
Mar. 08, 2007
Jeff A. Babcock, Sunnyvale, CA (US);
Steve Adler, Cape Elizabeth, ME (US);
Todd Thiebeault, Gorham, ME (US);
Jamal Ramdani, Scarborough, ME (US);
Jeff A. Babcock, Sunnyvale, CA (US);
Steve Adler, Cape Elizabeth, ME (US);
Todd Thiebeault, Gorham, ME (US);
Jamal Ramdani, Scarborough, ME (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A bipolar transistor device architecture and method of manufacture uses doped glass on the sidewall of the emitter window opening to reduce the emitter-base overlap capacitance while at the same time improving the polysilicon plugging effect. The doped glass sidewall also improves dopant loss in the oxide in the case in which an in-situ doped poly emitter is used. By using a doped sidewall glass, the sensitivity of dopant absorption that can potentially occur in un-doped spacers is removed. The proposed technique also provides a simple method for achieving narrow emitter window openings while simultaneously improving doping uniformity compared to implanted poly techniques. The technique also allows a self-aligned base to be performed, thereby allowing tighter spacing between the extrinsic base and the intrinsic base.