The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2009

Filed:

Jun. 19, 2008
Applicants:

Naomi Shida, Tokyo, JP;

Masaaki Tamatani, Fujisawa, JP;

Yoshihito Tsutsui, Chigasaki, JP;

Kazuaki Ootsuka, Yokosuka, JP;

Ryosuke Hiramatsu, Kawasaki, JP;

Inventors:

Naomi Shida, Tokyo, JP;

Masaaki Tamatani, Fujisawa, JP;

Yoshihito Tsutsui, Chigasaki, JP;

Kazuaki Ootsuka, Yokosuka, JP;

Ryosuke Hiramatsu, Kawasaki, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C09K 11/59 (2006.01); C09K 11/55 (2006.01);
U.S. Cl.
CPC ...
Abstract

An field effect transistor includes a first semiconductor region, a gate electrode insulatively disposed over the first semiconductor region, source and drain electrodes between which the first semiconductor region is sandwiched, and second semiconductor regions each formed between the first semiconductor region and one of the source and drain electrodes, and having impurity concentration higher than that of the first semiconductor region, the source electrode being offset to the gate electrode in a direction in which the source electrode and the drain electrode are separated from each other with respect to a channel direction, and one of the second semiconductor regions having a thickness not more than a thickness with which the one of second semiconductor regions is completely depleted in the channel direction being in thermal equilibrium with the source electrode therewith.


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