The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7571340 B1

PDF
Full Text
Expired
Date of Patent:
Aug. 04, 2009

Filed:

Jun. 13, 2006
Applicant:

Yueming Jiang, Rancho Cordova, CA (US);

Inventor:

Yueming Jiang, Rancho Cordova, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

Integrated circuits include clock deskew circuitry. The clock deskew circuitry, at the receiver side, receives data signals and a forwarded clock signal from a transmitter. The receiver detects a clock drift in a receiver clock tree, and transmits the detected clock drift to the transmitter. Based on the detected clock drift, the transmitter adjusts the timing of the transmitted signals so that the center of the data eye is aligned with the clock edge at the output of the receiver clock tree.


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Jiang, Yueming. (2009). Eliminating receiver clock drift caused by voltage and temperature change in a high-speed i/o system that uses a forwarded clock (U.S. Patent No. 7571340). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7571340

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