The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2009
Filed:
Jan. 30, 2007
Atsuhiro Kinoshita, Kamakura, JP;
Riichiro Shirota, Fujisawa, JP;
Hiroshi Watanabe, Yokohama, JP;
Kenichi Murooka, Yokohama, JP;
Junji Koga, Yokosuka, JP;
Atsuhiro Kinoshita, Kamakura, JP;
Riichiro Shirota, Fujisawa, JP;
Hiroshi Watanabe, Yokohama, JP;
Kenichi Murooka, Yokohama, JP;
Junji Koga, Yokosuka, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A nonvolatile semiconductor memory device includes a semiconductor substrate, plural semiconductor columns arranged in a matrix form on the substrate, plural first conductive areas zonally formed in a column direction on the substrate between the semiconductor columns and functioning as word lines, plural second conductive areas formed at tops of the semiconductor columns, respectively, plural bit lines connecting the second conductive areas in a row direction, plural channel areas respectively formed in the semiconductor columns between the first and second conductive areas and contacting the first and second conductive areas, plural third conductive areas continuously formed via first insulating films above the substrate and opposite to the channel areas in the column direction between the semiconductor columns and functioning as control gates, and plural charge accumulation areas respectively formed via second insulating films at upper portions of the channel areas at a position higher than the third conductive areas.