The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2009

Filed:

Dec. 29, 2006
Applicants:

Nicole Meier Chang, Mountain View, CA (US);

George J. Korsh, Redwod City, CA (US);

Shafqat Ahmed, San Jose, CA (US);

John Nugent, Santa Clara, CA (US);

Ed Nabighian, Fremont, CA (US);

Inventors:

Nicole Meier Chang, Mountain View, CA (US);

George J. Korsh, Redwod City, CA (US);

Shafqat Ahmed, San Jose, CA (US);

John Nugent, Santa Clara, CA (US);

Ed Nabighian, Fremont, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/74 (2006.01);
U.S. Cl.
CPC ...
Abstract

An embodiment of the present invention is a technique to prevent reliability failures in semiconductor devices. A trench is patterned in a polyimide layer over a guard ring having a top metal layer. A passivation layer is etched at bottom of the trench. A capping layer is deposited on the trench over the etched passivation layer. The capping layer and the top metal layer form a mechanical strong interface to prevent a crack propagation.


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