The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2009
Filed:
May. 25, 2005
Ryosuke Usui, Aichi, JP;
Hideki Mizuhara, Aichi, JP;
Yusuke Igarashi, Gunma, JP;
Nobuhisa Takakusaki, Gunma, JP;
Hayato Abe, Gunma, JP;
Ryosuke Usui, Aichi, JP;
Hideki Mizuhara, Aichi, JP;
Yusuke Igarashi, Gunma, JP;
Nobuhisa Takakusaki, Gunma, JP;
Hayato Abe, Gunma, JP;
Sanyo Electric Co., Ltd., Osaka, JP;
Abstract
A method for manufacturing a circuit device, which is suitable for connecting a plurality of laminated wiring layers to each other through an insulating layer, is provided. In a method for manufacturing a hybrid integrated circuit device of the present invention, a first wring layer is formed by laminating a first conductive film on a first insulating layer, and patterning the first conductive film. In the first wiring layer, a first connection part which is protruded in a thickness direction is formed. Moreover, the first wiring layer including the first connection part is covered with a second insulating layer. The second insulating layer is formed of a first resin film and a second resin film. The second resin film contains fewer inorganic fillers than the first resin film. Thus, there is an advantage that a through-hole can be easily formed.