The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2009

Filed:

Sep. 28, 2007
Applicants:

Nader Rohani, Scottsdale, AZ (US);

Hongtao Xu, Beaverton, OR (US);

Yulin Tan, Portland, OR (US);

Inventors:

Nader Rohani, Scottsdale, AZ (US);

Hongtao Xu, Beaverton, OR (US);

Yulin Tan, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03G 3/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

Dynamic biasing techniques are used to enhance both linearity and efficiency within a transistor power amplifier. In at least one embodiment, as the power level being processed by a transistor increases toward a saturation point, a transistor is moved from class B or class AB operation toward class A operation. This increases the linearity of operation (because class A operation is typically highly linear) without a corresponding decrease in efficiency (because efficiency typically peaks near saturation). Similarly, as the power level decreases from the saturation point, the transistor is moved from class A or class AB operation toward class B operation. This increases the efficiency (because class B operation is more efficient than class A or AB), while having little effect on linearity (because operation is moving away from saturation).


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