The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2009
Filed:
Aug. 11, 2004
Shafidul Islam, Plano, TX (US);
Daniel K. Lau, San Francisco, CA (US);
Romarico S. San Antonio, Batam Island, ID;
Anang Subagio, Batam Island, ID;
Michael H. Mckerreghan, Farmers Branch, TX (US);
Edmunda G-o. Litilit, Baguio, PH;
Shafidul Islam, Plano, TX (US);
Daniel K. Lau, San Francisco, CA (US);
Romarico S. San Antonio, Batam Island, ID;
Anang Subagio, Batam Island, ID;
Michael H. McKerreghan, Farmers Branch, TX (US);
Edmunda G-O. Litilit, Baguio, PH;
Unisem (Mauritius) Holdings Limited, Port Louis, MU;
Abstract
A lead frame () for a semiconductor device (die) package () is described. Each of the leads () in the lead frame () includes an interposer () having one end () disposed proximate the outer face () of the package () and another end () disposed proximate the die (). Extending from opposite ends of the interposer () are a board connecting post () and a support post (). A bond site () is formed on a surface of the interposer () opposite the support post (). Each of the leads () is electrically connected to an associated input/output (I/O) pad () on the die () via wirebonding, tape bonding, or flip-chip attachment to the bond site (). Where wirebonding is used, a wire electrically connecting the I/O pad () to the bond site () may be wedge bonded to both the I/O pad () and the bond site (). The support post () provides support to the end () of the interposer () during the bonding and coating processes.(FIG.).