The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2009
Filed:
Aug. 09, 2007
Method of generating a standard cell layout and transferring the standard cell layout to a substrate
Applicants:
Wei-jen Wang, Tainan County, TW;
Chen-hsien Hsu, Hsinchu County, TW;
Chien-kuo Wang, Hsin-Chu, TW;
Dar-sun Tsien, Los Altos, CA (US);
Inventors:
Wei-Jen Wang, Tainan County, TW;
Chen-Hsien Hsu, Hsinchu County, TW;
Chien-Kuo Wang, Hsin-Chu, TW;
Dar-Sun Tsien, Los Altos, CA (US);
Assignee:
United Microelectronics Corp., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method of generating a standard cell layout includes analyzing a circuit of a standard cell layout and obtaining an analysis result, selecting a plurality of leaf cell layout according to the analysis result, and piecing together the leaf cell layouts to generate the standard cell layout.