The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2009
Filed:
Jul. 14, 2006
James W. Tschanz, Portland, OR (US);
Nasser A. Kurd, Portland, OR (US);
Javed Barkatullah, Portland, OR (US);
Vivek K. DE, Beaverton, OR (US);
James W. Tschanz, Portland, OR (US);
Nasser A. Kurd, Portland, OR (US);
Javed Barkatullah, Portland, OR (US);
Vivek K. De, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method and chip design are provided for reducing power consumption. A first functional block having a phase logic circuit may be provided in a first area of a chip. A second functional block having an edge-triggered circuit may be provided in a second area of the chip. Edge-triggered circuits within the second functional block may be replaced with dual edge-triggered circuits. Phase logic circuits may be clocked by a full frequency clock signal and dual edge-triggered circuits may be clocked by a half-frequency clock signal.