The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2009
Filed:
Aug. 08, 2005
Lily X. Springer, Dallas, TX (US);
Haim Horovitz, Los Altos, CA (US);
Robert Graham Shaw, Jr., Nashua, NH (US);
Sameer Pendharkar, Allen, TX (US);
Wen-hwa M. Chu, Plano, TX (US);
Paul C. Mannas, Plano, TX (US);
Lily X. Springer, Dallas, TX (US);
Haim Horovitz, Los Altos, CA (US);
Robert Graham Shaw, Jr., Nashua, NH (US);
Sameer Pendharkar, Allen, TX (US);
Wen-Hwa M. Chu, Plano, TX (US);
Paul C. Mannas, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
Validation of at least some of a proposed semiconductor design layout is disclosed. According to one or more aspects of the present invention, a first voltage dependent design rule is applied to an edge of an area of the layout if the edge is not covered by a pseudo layer. A second voltage dependent design rule is, on the other hand, applied to the edge of the area if the edge is covered by the pseudo layer.