The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2009

Filed:

Aug. 23, 2005
Applicants:

Yen-hao Shih, Changhua County, TW;

Chia-hua Ho, Kaohsiung, TW;

Hang-ting Lue, Hsinchu, TW;

Erh-kun Lai, Taichung County, TW;

Kuang Yeu Hsieh, Hsin Chu, TW;

Inventors:

Yen-Hao Shih, Changhua County, TW;

Chia-Hua Ho, Kaohsiung, TW;

Hang-Ting Lue, Hsinchu, TW;

Erh-Kun Lai, Taichung County, TW;

Kuang Yeu Hsieh, Hsin Chu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/80 (2006.01);
U.S. Cl.
CPC ...
Abstract

A NAND-type flash memory device includes asymmetric floating gates overlying respective wordlines. A given floating gate is sufficiently coupled to its respective wordline such that a large gate (i.e., wordline) bias voltage will couple the floating gate with a voltage which can invert the channel under the floating gate. The inversion channel under the floating gate can thus serve as the source/drain. As a result, the memory device does not need a shallow junction, or an assist-gate. In addition, the memory device exhibits relatively low floating gate-to-floating gate (FG-FG) interference.


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