The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2009
Filed:
Jun. 30, 2005
Applicants:
Ofir Kanter, Haifa, IL;
Eran Peleg, Akko, IL;
Ehud Shoor, Nesher, IL;
Eli Sterin, Nofit, IL;
Inventors:
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06K 5/04 (2006.01); G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
Apparatus, systems, methods, and articles may operate to move an output phase of a clock phase adjustment device associated with a master clock through a plurality of phase shifts relative to a phase of the master clock. A data integrity test may be performed on a serial data receive circuit clocked using an output phase of the clock phase adjustment device following each one of the plurality of phase shifts.
Kanter, Ofir. (2009). Jitter tolerance testing apparatus, systems, and methods (U.S. Patent No. 7552366). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7552366
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile