The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2009
Filed:
May. 31, 2007
Jon S. Choy, Austin, TX (US);
David W. Chrudimsky, Austin, TX (US);
Jon S. Choy, Austin, TX (US);
David W. Chrudimsky, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
An integrated circuit () comprises a plurality of non-volatile memory cells () and a charge distribution ramp rate control circuit (). Each memory cell of the array () includes a charge storage region and a plurality of terminals. The charge distribution ramp rate control circuit includes a capacitor () having a first plate electrode coupled to at least one terminal of the plurality of terminals, and a second plate electrode. The charge distribution ramp rate control circuit further includes a bandgap generated current source () for providing a reference current to determine a ramp rate of a voltage at the at least one terminal.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile