The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2009
Filed:
May. 08, 2008
Brent Alan Anderson, Jericho, VT (US);
Shahid Ahmad Butt, Ossining, NY (US);
Allen H. Gabor, Katonah, NY (US);
Patrick Edward Lindo, Poughkeepsie, NY (US);
Edward Joseph Nowak, Essex Junction, VT (US);
Jed Hickory Rankin, South Burlington, VT (US);
Brent Alan Anderson, Jericho, VT (US);
Shahid Ahmad Butt, Ossining, NY (US);
Allen H. Gabor, Katonah, NY (US);
Patrick Edward Lindo, Poughkeepsie, NY (US);
Edward Joseph Nowak, Essex Junction, VT (US);
Jed Hickory Rankin, South Burlington, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method of reducing parametric variation in an integrated circuit (IC) chip and an IC chip with reduced parametric variation. The method includes: on a first wafer having a first arrangement of chips, each IC chip divided into a second arrangement of regions, measuring a test device parameter of test devices distributed in different regions; and on a second wafer having the first arrangement of IC chips and the second arrangement of regions, adjusting a functional device parameter of identically designed field effect transistors within one or more regions of all IC chips of the second wafer based on a values of the test device parameter measured on test devices in regions of the IC chip of the first wafer by a non-uniform adjustment of physical or metallurgical polysilicon gate widths of the identically designed field effect transistors from region to region within each IC chip.