The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2009
Filed:
Jun. 30, 2006
Giuseppe Curello, Portland, OR (US);
Ian R. Post, Portland, OR (US);
Chia-hong Jan, Portland, OR (US);
Mark Bohr, Aloha, OR (US);
Giuseppe Curello, Portland, OR (US);
Ian R. Post, Portland, OR (US);
Chia-Hong Jan, Portland, OR (US);
Mark Bohr, Aloha, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method of selectively forming a spacer on a first class of transistors and devices formed by such methods. The method can include depositing a conformal first deposition layer on a substrate with different classes of transistors situated thereon, depositing a blocking layer to at least one class of transistors, dry etching the first deposition layer, removing the blocking layer, depositing a conformal second deposition layer on the substrate, dry etching the second deposition layer and wet etching the remaining first deposition layer. Devices may include transistors of a first class with larger spacers compared to spacers of transistors of a second class.