The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 2009
Filed:
Jul. 25, 2006
Greg Horlick, Madison State, AL (US);
Randall Lawson, Westford, MA (US);
Donald Morgan, Chelmsford, MA (US);
Paul Musto, Hollis, NH (US);
Joe Smedley, Chelmsford, MA (US);
Ken Wadland, Grafton, MA (US);
Richard Woodward, San Diego, CA (US);
Sean Bergan, Andover, MA (US);
Walter M. Katz, Boulder, CO (US);
Greg Horlick, Madison State, AL (US);
Randall Lawson, Westford, MA (US);
Donald Morgan, Chelmsford, MA (US);
Paul Musto, Hollis, NH (US);
Joe Smedley, Chelmsford, MA (US);
Ken Wadland, Grafton, MA (US);
Richard Woodward, San Diego, CA (US);
Sean Bergan, Andover, MA (US);
Walter M. Katz, Boulder, CO (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
A mechanism is provided for the user to define a circuit design intent or strategy in the form of data that is stored with the design database. An autorouter then uses this guidance from the user to create a plan for routing the design. The user can then modify their guidance to the router until the results for the plan are acceptable. Using the planned flow, the autorouter can complete the design, creating detailed paths including etch segments and vias. Allowing such interaction with an autorouter significantly reduces the routing time and hence time-to-market.