The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 2009
Filed:
Jun. 27, 2006
Shaker Sarwary, San Diego, CA (US);
Jun Yuan, San Jose, CA (US);
Bernard Murphy, Tuolumne, CA (US);
Ashish Hari, Delhi, IN;
Paras Mal Jain, Alwar, IN;
Shaker Sarwary, San Diego, CA (US);
Jun Yuan, San Jose, CA (US);
Bernard Murphy, Tuolumne, CA (US);
Ashish Hari, Delhi, IN;
Paras Mal Jain, Alwar, IN;
Atrenta, Inc., San Jose, CA (US);
Abstract
First-in-first-out (FIFO) structures are recognized and verified in integrated circuit (IC) designs. The FIFO recognition is based on structural analysis of the design. Specifically, the structural analysis includes performing seed based recognition by identifying logic elements that indicate the existence of candidate FIFO circuitry and then exploring the candidate circuitry to completely verify the presence of a FIFO structure. Recognized FIFOs may be verified to ensure the proper generation of the full and empty flags.