The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7536494 B1

PDF
Full Text
Expired
Date of Patent:
May. 19, 2009

Filed:

May. 22, 2007
Applicants:

Bruno W. Garlepp, Austin, TX (US);

Richard M. Barth, Ashland, OR (US);

Kevin S. Donnelly, Los Altos, CA (US);

Ely K. Tsern, Los Altos, CA (US);

Craig E. Hampel, San Jose, CA (US);

Jeffrey D. Mitchell, Santa Clara, CA (US);

James A. Gasbarro, Fox Chapel, PA (US);

Billy W. Garrett, Jr., Mountain View, CA (US);

Fredrick A. Ware, Los Altos Hills, CA (US);

Donald V. Perino, North Potomac, MD (US);

Inventors:

Bruno W. Garlepp, Austin, TX (US);

Richard M. Barth, Ashland, OR (US);

Kevin S. Donnelly, Los Altos, CA (US);

Ely K. Tsern, Los Altos, CA (US);

Craig E. Hampel, San Jose, CA (US);

Jeffrey D. Mitchell, Santa Clara, CA (US);

James A. Gasbarro, Fox Chapel, PA (US);

Billy W. Garrett, Jr., Mountain View, CA (US);

Fredrick A. Ware, Los Altos Hills, CA (US);

Donald V. Perino, North Potomac, MD (US);

Assignee:

Rambus Inc., Los Altos, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system includes a first bus, a master device coupled to the first bus, and one or more subsystems coupled to the first bus. A respective subsystem includes a second bus, one or more slave devices coupled to the second bus, a write buffer to receive incoming signals from the master device via the first bus and to transmit signals to the one or more slave devices via the second bus in response to the incoming signals, and a read buffer to receive outgoing signals from the one or more slave devices via the second bus and to transmit signals to the master device via the first bus in response to the outgoing signals.


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