The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 2009
Filed:
Jan. 24, 2007
Osamu Shiono, Hitachi, JP;
Takao Ishikawa, Hitachi, JP;
Takashi Namekawa, Hitachi, JP;
Yasutaka Suzuki, Hitachi, JP;
Takashi Naito, Hitachi, JP;
Hiroki Yamamoto, Hitachi, JP;
Daigorou Kamoto, Hitachi, JP;
Ken Takahashi, Hitachi, JP;
Tadanori Segawa, Hitachi, JP;
Toshiya Satoh, Hitachi, JP;
Takao Miwa, Hitachi, JP;
Shigehisa Motowaki, Hitachi, JP;
Osamu Shiono, Hitachi, JP;
Takao Ishikawa, Hitachi, JP;
Takashi Namekawa, Hitachi, JP;
Yasutaka Suzuki, Hitachi, JP;
Takashi Naito, Hitachi, JP;
Hiroki Yamamoto, Hitachi, JP;
Daigorou Kamoto, Hitachi, JP;
Ken Takahashi, Hitachi, JP;
Tadanori Segawa, Hitachi, JP;
Toshiya Satoh, Hitachi, JP;
Takao Miwa, Hitachi, JP;
Shigehisa Motowaki, Hitachi, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
A wiring glass substrate includes a glass substrate formed of glass and having a plurality of holes formed at predetermined positions, bumps so formed as to be connected to a conductive material filling the holes and wirings formed on a surface opposite to a surface having the bumps formed thereon and electrically connecting a plurality of connection terminals arranged in intervals different from intervals of the holes to the conductive material. The shape of the conductive material is porous and porous electrodes are bonded to the inner wall surfaces of the holes by an anchor effect to increase the strength of the glass substrate.