The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 2009
Filed:
Feb. 19, 2008
Suk-jin Chung, Gyeonggi-do, KR;
Seung-hwan Lee, Seoul, KR;
Sung-tae Kim, Seoul, KR;
Young-sun Kim, Gyeonggi-do, KR;
Jae-soon Lim, Seoul, KR;
Young-geun Park, Gyeonggi-do, KR;
Suk-jin Chung, Gyeonggi-do, KR;
Seung-hwan Lee, Seoul, KR;
Sung-tae Kim, Seoul, KR;
Young-sun Kim, Gyeonggi-do, KR;
Jae-soon Lim, Seoul, KR;
Young-geun Park, Gyeonggi-do, KR;
Samsung Electronics Co., Ltd, , KR;
Abstract
Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the first layer opposite to the substrate. A mask is formed that has an opening on top of the first and second layers. A first trench is formed by removing a portion of the first and second layers through the opening in the mask. A portion of the first layer under the second layer is removed to form an undercut region under the second layer. An insulating layer collar is formed in the undercut region under the second layer. A second trench is formed that extends from the first trench by removing a portion of the substrate through the opening in the mask. A buried plate is formed in the substrate along the second trench. A dielectric layer is formed on an inner wall and bottom of the second trench. A storage electrode is formed in the second trench on the dielectric layer.