The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2009

Filed:

Mar. 19, 2004
Applicants:

Motoo Suwa, Tokyo, JP;

Yoshinori Miyaki, Tokyo, JP;

Toru Hayashi, Tokyo, JP;

Ryoichi Sano, Tokyo, JP;

Shigezumi Matsui, Tokyo, JP;

Takanobu Naruse, Tokyo, JP;

Takashi Sato, Tokyo, JP;

Hisashi Shiota, Tokyo, JP;

Inventors:

Motoo Suwa, Tokyo, JP;

Yoshinori Miyaki, Tokyo, JP;

Toru Hayashi, Tokyo, JP;

Ryoichi Sano, Tokyo, JP;

Shigezumi Matsui, Tokyo, JP;

Takanobu Naruse, Tokyo, JP;

Takashi Sato, Tokyo, JP;

Hisashi Shiota, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01);
U.S. Cl.
CPC ...
Abstract

An electronic circuit includes a first semiconductor device and a second semiconductor device on a mounting substrate. The mounting substrate lines have lengths which are made unequal for respective bits. Assembling lines which reach connecting electrodes of a semiconductor chip from the external terminals of the second semiconductor device have made lengths thereof unequal for respective bits. The unequal lengths of the mounting substrate lines have a relationship which offsets the unequal lengths of the assembling lines.


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