The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2009

Filed:

Nov. 09, 2006
Applicants:

Homare Sato, Tokyo, JP;

Kiyoshi Nakai, Tokyo, JP;

Inventors:

Homare Sato, Tokyo, JP;

Kiyoshi Nakai, Tokyo, JP;

Assignee:

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 47/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A non-volatile semiconductor memory device includes a plurality of lower electrodes arranged in a matrix manner, a plurality of recording layer patterns, each being arranged on the lower electrode, that contain a phase change material, and an interlayer insulation film that is provided between the lower electrode and the recording layer pattern and that has a plurality of apertures for exposing one portion of the lower electrode. The lower electrode and the recording layer pattern are connected in each aperture. The apertures extend in the X direction in parallel to one another. The recording layer patterns extend in the Y direction in parallel to one another. Thus the aperture can be formed with higher accuracy as compared to forming an independent aperture. Accordingly, high heating efficiency can be obtained while effectively preventing occurrence of poor connection or the like.


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